The following schematic diagram shows two four-bit universal shift registers used to communicate data serially over a coaxial cable of unspecified length:



Specify what logic states would have to be input at the PL, CE, and Clk terminals of each shift register, and at what times, to successfully load four bits of parallel data, shift them serially over the coaxial data cable, and then hold them at the outputs (Q) of the receiving shift register.